Nexus Technology reports that their DDR4 protocol analysis software and real-time memory analyzer supports JEDEC’s recently announced DDR4 Protocol Checks Engineering Procedure document JEP175.
“JEP175 is an important document that will help the industry standardize on protocol compliance and performance of memory systems. Representing a minimal but standardized set of procedures for the industry to follow, JEP175 is fully supported from day one with our real-time analyzer and protocol analysis software,” said Chris Shelsky, System Architect, Nexus Technology, Inc.
The DDR4 Protocol Checks Engineering Procedure document (JEP175) provides a concise accounting for many of the protocol checks that are necessary to confirm compliance to the DDR4 specification. These checks may also be measured and used for margin and performance analysis. Conforming to the latest specification of DDR4 (JESD79-4B released just last month), JEP175 is up to date with 55 unique checks.
Nexus’ real-time analyzer for DDR4 is the MA4100 and supports LRDIMM, R-DIMM, U-DIMM, SODIMM, and individual component bus monitoring. Similar to a logic analyzer and highly customized with real-time compliance and performance for DDR4, the MA4100 enables simultaneous compliance, performance and state capture of DDR4 traffic. This analyzer is required to validate compliance in real-world applications that is impossible to cover in verification simulations. The real-time analysis engine runs at-speed, processing up to 64Gbps to provide statistical insight and compliance validation as quickly as the data arrives. The real-time analysis engine is also coupled to the industry’s leading trigger and 1G-sample deep storage system. You can find more information on the MA4100 on our website.
Nexus’ DDR4 Protocol analysis software (PA-DDR4) enables memory interface functionality, timing and compliance analysis of simulated or post-capture DDR4 traffic. The software implements the same analysis package found in the MA4100 analyzer. This enables identical protocol checks during both verification and validation while also providing the same user experience and an easy transition from verification using industry standard VIP simulation packages to real-world validation using the MA4100 analyzer.
Having the same analysis packages and protocol checks performed during verification and validation, using the DDR4 protocol analysis software (PA-DDR4) and MA4100 analyzer, respectively, helps identify real design issues earlier and faster. This allows faster time-to-market for products implementing DDR4 memory. The core tools necessary to test, verify and validate any DDR4 design are: an industry standard simulation tool with a DDR4 controller model and memory model, Nexus’ NEX-PA-DDR4 software package, Nexus’ MA4100 analyzer and a high-speed oscilloscope.